Teraflop computing on a chip around the corner

Intel says it is close to producing terascale computing on a single processor.

Speaking at the Intel Developer Forum in San Francisco CEO Paul Otellini showed delegates a tiny prototype silicon die with 80 specialist cores capable of performing one trillion floating-point operations per second (terflops), and said it would be commercially available within about five years. Each core on the wafer operates at 3.1GHz. 

Used in data centres, it will enable many new types of services, he said, such as real-time speech translation from one language to another and to share real-time video.

Development work to move towards teraflop computing includes working on ways to stack the 20MB memory and CPU on a single die, enabling a terabyte of memory bandwidth and a hybrid laser that enables terabit per second input/output link.

The work has seen Intel, with University partners, researching silicon photonics and developing an electrically pumped hybrid laser, putting 25 lasers on a single die. This means data speeds hit a terabit per second. At IDF, Intel gave the first public demonstration of its hybrid laser, using four lasers on a single die.

Professor John Bowers from the University of California, said taking a Cmos approach is far cheaper: “Photonics has incredible capacity bet has been expensive.”