UK superchip beats Xeons

The most impressive device at the Intel Developer Forum (IDF)in San Francisco in terms of speed and power consumption was a co-processor board from UK company Clearspeed. It has been rated at 50 billion floating point operations per second (50Gflops) while drawing a maximum 25w of power ­ the consumption of a frugal notebook.

The Advance board reached just over half that speed in an IDF demonstration, but that was still more than five times as fast as a comparison system running twin 3.2GHz Xeons.

It uses two Clearspeed CSX600 co-processors, the latest version of the CS301 superchip the company launched in late 2003 (see PCW, January 2004, page 19).

Like the brilliant but ill-fated Inmos Transputer in the 1980s, which some of the Clearspeed team helped develop, CSX600 chips are designed to be linked in arrays to boost power. Multiple Advance boards can also be used in a single system.

The CSX600 itself contains an array of 96 processing units, which are computers in themselves, co-ordinated by a control and execution module ­ an architecture not unlike that of the Cell chip developed by Sony, Toshiba and Motorola, though that has just eight satellite processing units.

Clearspeed stresses that the CSX800 processing units are much more than simple arithmetic logic units. They use a Very Long Instruction Word (VLIW) instruction set, in a similar way to Transmeta’s Crusoe chips.

Sadly, the chips work only with software that knows how to take advantage of them. They accelerate the execution of certain operations implemented in standard code libraries used to build applications, and are designed to be used in workstations doing intensive tasks such as weather and finance forecasts, risk modelling and image processing.

The current board needs a PCI-X slot but a PCI Express version will be launched early next year.

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